Issued Patents 2002
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6473888 | Timing verifier for MOS devices and related method | Nevine Nassif, Madhav Desai, Harry Ray Fair, III, Roy Badeau, Nicholas Lee Rethman | 2002-10-29 |
| 6438732 | Method and apparatus for modeling gate capacitance of symmetrically and asymmetrically sized differential cascode voltage swing logic (DCVSL) | Harry Ray Fair, III, Nevine Nassif, Gill Watt | 2002-08-20 |
| 6405304 | Method for mapping instructions using a set of valid and invalid logical to physical register assignments indicated by bits of a valid vector together with a logical register list | Sharon Marie Britton, Harry Ray Fair, III, Bruce Gieseke, Daniel Leibholz, Derrick R. Meyer | 2002-06-11 |