PL

Pei-Hu Lin

VT Vlsi Technology: 2 patents #12 of 143Top 9%
📍 San Jose, CA: #163 of 1,308 inventorsTop 15%
🗺 California: #1,869 of 17,285 inventorsTop 15%
Overall (1997): #27,631 of 185,788Top 15%
2
Patents 1997

Issued Patents 1997

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
5625797 Automatic optimization of a compiled memory structure based on user selected criteria Thomas V. Ferry, Russell L. Steinweg, Michael A. Zampaglione 1997-04-29
5596505 Estimation of pin-to-pin timing for compiled blocks Russell L. Steinweg, Michael A. Zampaglione 1997-01-21