Issued Patents 1997
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5680571 | Multi-processor data processing system with multiple, separate instruction and operand second level caches | — | 1997-10-21 |
| 5678026 | Multi-processor data processing system with control for granting multiple storage locks in parallel and parallel lock priority and second level cache priority queues | Kelvin S. Vartti | 1997-10-14 |
| 5625892 | Dynamic power regulator for controlling memory power consumption | Michael Haupt | 1997-04-29 |
| 5617375 | Dayclock carry and compare tree | James L. Federici | 1997-04-01 |
| 5603005 | Cache coherency scheme for XBAR storage structure with delayed invalidates until associated write request is executed | Michael Haupt | 1997-02-11 |