JR

John T. Rusterholz

UN Unisys: 2 patents #15 of 200Top 8%
📍 Roseville, MN: #4 of 52 inventorsTop 8%
🗺 Minnesota: #307 of 3,156 inventorsTop 10%
Overall (1997): #34,985 of 185,788Top 20%
2
Patents 1997

Issued Patents 1997

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
5696693 Method for placing logic functions and cells in a logic design using floor planning by analogy Mark D. Aubel, Arthur F. Boehm, Joseph P. Kerzman, James E. Rezek, Richard F. Paul 1997-12-09
5634113 Method for generating a preferred processing order and for detecting cycles in a directed graph used to represent system component connectivity 1997-05-27