Issued Patents 1997
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5701307 | Low overhead input and output boundary scan cells | — | 1997-12-23 |
| 5687312 | Method and apparatus for processor emulation | — | 1997-11-11 |
| 5687179 | Serial data input/output method and apparatus | Benjamin H. Ashmore, Jr. | 1997-11-11 |
| 5677915 | Customized method and apparatus for streamlined testing a particular electrical circuit | — | 1997-10-14 |
| 5656953 | Low overhead memory designs for IC terminals | — | 1997-08-12 |
| 5640521 | Addressable shadow port and protocol with remote I/O, contol and interrupt ports | — | 1997-06-17 |
| 5631911 | Integrated test circuit | — | 1997-05-20 |
| 5627839 | Scan cell output latches using switches and bus holders | — | 1997-05-06 |
| 5623500 | Event qualified test architecture | — | 1997-04-22 |
| 5617420 | Hierarchical connection method, apparatus, and protocol | — | 1997-04-01 |
| 5610826 | Analog signal monitor circuit and method | — | 1997-03-11 |
| 5610530 | Analog interconnect testing | — | 1997-03-11 |
| 5606566 | Method and apparatus for streamlined concurrent testing of electrical circuits | — | 1997-02-25 |
| 5602855 | Integrated test circuit | — | 1997-02-11 |