AJ

Anurag Mithalal Jain

📍 Bengaluru, CA: #3 of 7 inventorsTop 45%
Overall (1997): #176,472 of 185,788Top 95%
1
Patents 1997

Issued Patents 1997

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
5678028 Hardware-software debugger using simulation speed enhancing techniques including skipping unnecessary bus cycles, avoiding instruction fetch simulation, eliminating the need for explicit clock pulse generation and caching results of instruction decoding Mikhail Bershteyn, Ross T. Casley, Chiahon Chien, Abhijit Ghosh, Michael Leigh Lipsie +2 more 1997-10-14