Issued Patents 1997
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5607867 | Method of forming a controlled low collector breakdown voltage transistor for ESD protection circuits | Ajith Amerasekera | 1997-03-04 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5607867 | Method of forming a controlled low collector breakdown voltage transistor for ESD protection circuits | Ajith Amerasekera | 1997-03-04 |