Issued Patents 1997
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5703827 | Method and structure for generating a boosted word line voltage and a back bias voltage for a memory array | Jeffrey Lin | 1997-12-30 |
| 5666480 | Fault-tolerant hierarchical bus system and method of operating same | Fu-Chieh Hsu | 1997-09-09 |
| 5655113 | Resynchronization circuit for a memory system and method of operating same | Winston Lee, Fu-Chieh Hsu | 1997-08-05 |
| 5615169 | Method and structure for controlling internal operations of a DRAM array | — | 1997-03-25 |
| 5596610 | Delay stage circuitry for a ring oscillator | Mark A. Horowitz | 1997-01-21 |