Issued Patents 1997
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5700727 | Method of forming a thin film transistor | — | 1997-12-23 |
| 5700733 | Semiconductor processing methods of forming field oxide regions on a semiconductor substrate | — | 1997-12-23 |
| 5691565 | Integrated circuitry having a pair of adjacent conductive lines | — | 1997-11-25 |
| 5691547 | Planar thin film transistor structures | Charles H. Dennison | 1997-11-25 |
| 5683930 | SRAM cell employing substantially vertically elongated pull-up resistors and methods of making, and resistor constructions and methods of making | Shubneesh Batra | 1997-11-04 |
| 5681778 | Semiconductor processing method of forming a buried contact and conductive line | — | 1997-10-28 |
| 5677241 | Integrated circuitry having a pair of adjacent conductive lines and method of forming | — | 1997-10-14 |
| 5670399 | Method of making thin film transistor with offset drain | Shubneesh Batra | 1997-09-23 |
| 5670794 | Thin film transistors | — | 1997-09-23 |
| 5663679 | Thin film transistor redundancy structure | — | 1997-09-02 |
| 5661045 | Method for forming and tailoring the electrical characteristics of semiconductor devices | Charles H. Dennison, Howard E. Rhodes, Tyler Lowrey | 1997-08-26 |
| 5659183 | Thin film transistor having a drain offset region | Shubneesh Batra | 1997-08-19 |
| 5658807 | Methods of forming conductive polysilicon lines and bottom gated thin film transistors | — | 1997-08-19 |
| 5650655 | Integrated circuitry having electrical interconnects | Charles H. Dennison | 1997-07-22 |
| 5644540 | Redundancy elements using thin film transistors (TFTs) | — | 1997-07-01 |
| 5616934 | Fully planarized thin film transistor (TFT) and process to fabricate same | Charles H. Dennison | 1997-04-01 |
| 5600153 | Conductive polysilicon lines and thin film transistors | — | 1997-02-04 |