Issued Patents 1997
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5636160 | Nonvolatile semiconductor memory having a stress relaxing voltage applied to erase gate during data write | Tadashi Miyakawa, Masamichi Asano | 1997-06-03 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5636160 | Nonvolatile semiconductor memory having a stress relaxing voltage applied to erase gate during data write | Tadashi Miyakawa, Masamichi Asano | 1997-06-03 |