CL

Christopher F. Lane

IN Intel: 1 patents #208 of 703Top 30%
📍 San Jose, CA: #403 of 1,308 inventorsTop 35%
🗺 California: #4,598 of 17,285 inventorsTop 30%
Overall (1997): #167,877 of 185,788Top 95%
1
Patents 1997

Issued Patents 1997

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
5592102 Means and apparatus to minimize the effects of silicon processing defects in programmable logic devices Srinivas T. Reddy, Bonnie I. Wang 1997-01-07