Issued Patents 1997
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5649232 | Structure and method for multiple-level read buffer supporting optimal throttled read operations by regulating transfer rate | Philip A. Bourekas, Avigdor Willenz, Yeshayahu Mor | 1997-07-15 |
| 5636363 | Hardware control structure and method for off-chip monitoring entries of an on-chip cache | Philip A. Bourekas, Yeshayahu Mor | 1997-06-03 |