CL

Chuen-Der Lien

IT Integrated Device Technology: 8 patents #1 of 31Top 4%
📍 Los Altos Hills, CA: #4 of 86 inventorsTop 5%
🗺 California: #66 of 17,285 inventorsTop 1%
Overall (1997): #895 of 185,788Top 1%
9
Patents 1997

Issued Patents 1997

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
5693975 Compact P-channel/N-channel transistor structure 1997-12-02
5681769 Method of fabricating a high capacitance insulated-gate field effect transistor 1997-10-28
5679588 Method for fabricating P-wells and N-wells having optimized field and active regions Jeong Yeol Choi 1997-10-21
5675165 Stable SRAM cell using low backgate biased threshold voltage select transistors 1997-10-07
5654213 Method for fabricating a CMOS device Jeong Yeol Choi, Chung-Jen Chien, Chung Chyung Han 1997-08-05
5652456 Semiconductor structure containing multiple optimized well regions 1997-07-29
5643809 Method for making high speed poly-emitter bipolar transistor 1997-07-01
5644459 Bipolarity electrostatic discharge protection device and method for making same 1997-07-01
5644155 Structure and fabrication of high capacitance insulated-gate field effect transistor 1997-07-01