Issued Patents 1997
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5630271 | Method of forming a wiring pattern for an electronic circuit on a general-purpose circuit board | — | 1997-05-20 |
| 5592655 | Logic simulation method | Yoshio Takamine, Toshihiko Sugita | 1997-01-07 |