TB

Thomas D. Bissett

MT Marathon Technologies: 2 patents #1 of 7Top 15%
📍 Shirley, MA: #1 of 4 inventorsTop 25%
🗺 Massachusetts: #422 of 4,501 inventorsTop 10%
Overall (1997): #22,138 of 185,788Top 15%
2
Patents 1997

Issued Patents 1997

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
5615403 Method for executing I/O request by I/O processor after receiving trapped memory address directed to I/O device from all processors concurrently executing same program Richard D. Fiorentino, Robert M. Glorioso, Diane T. McCauley, James D. McCollum, Glenn A. Tremblay +1 more 1997-03-25
5600784 Fault resilient/fault tolerant computing Richard D. Fiorentino, Robert M. Glorioso, Diane T. McCauley, James D. McCollum, Glenn A. Tremblay 1997-02-04