PM

Patrick C. McGeer

CS Cadence Design Systems: 3 patents #1 of 18Top 6%
📍 Orinda, CA: #4 of 34 inventorsTop 15%
🗺 California: #921 of 17,285 inventorsTop 6%
Overall (1997): #12,358 of 185,788Top 7%
3
Patents 1997

Issued Patents 1997

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
5696692 Conditional selection method for reducing power consumption in a circuit Alexander Saldanha, Luciano Lavagno 1997-12-09
5682519 Method for reducing power consumption of switching nodes in a circuit Alexander Saldanha, Luciano Lavagno 1997-10-28
5649166 Dominator selection method for reducing power consumption in a circuit Alexander Saldanha 1997-07-15