Issued Patents 1997
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5692218 | System for transferring data between input/output devices having separate address spaces in accordance with initializing information in address packages | Michael Garcia, Charles Roberts Moore, Robert J. Reese | 1997-11-25 |
| 5687327 | System and method for allocating bus resources in a data processing system | Ravi Kumar Arimilli, John Michael Kaiser, William Kurt Lewchuk | 1997-11-11 |
| 5671370 | Alternating data valid control signals for high performance data transfer | Ravi Kumar Arimilli, John Michael Kaiser, William Kurt Lewchuk | 1997-09-23 |
| 5659708 | Cache coherency in a multiprocessing system | Ravi Kumar Arimilli, John Michael Kaiser, William Kurt Lewchuk | 1997-08-19 |
| 5649206 | Priority arbitration protocol with two resource requester classes and system therefor | — | 1997-07-15 |
| 5608878 | Dual latency status and coherency reporting for a multiprocessing system | Ravi Kumar Arimilli, John Michael Kaiser, William Kurt Lewchuk | 1997-03-04 |
| 5603057 | System for initiating data transfer between input/output devices having separate address spaces in accordance with initializing information in two address packages | Yoanna Baumgartner, Michael Garcia, Charles Roberts Moore, Robert J. Reese | 1997-02-11 |