Issued Patents 1997
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5678065 | Computer system employing an enable line for selectively adjusting a peripheral bus clock frequency | Sherman Lee | 1997-10-14 |
| 5671424 | Immediate system management interrupt source with associated reason register | Rita M. O'Brien | 1997-09-23 |
| 5666559 | Fail-safe communication abort mechanism for parallel ports with selectable NMI or parallel port interrupt | Scott C. Johnson | 1997-09-09 |
| 5664205 | Power management control technique for timer tick activity within an interrupt driven computer system | Rita M. O'Brien | 1997-09-02 |
| 5625807 | System and method for enabling and disabling a clock run function to control a peripheral bus clock signal | Sherman Lee | 1997-04-29 |
| 5606662 | Auto DRAM parity enable/disable mechanism | — | 1997-02-25 |
| 5606713 | System management interrupt source including a programmable counter and power management system employing the same | Rita M. O'Brien | 1997-02-25 |