Issued Patents 1997
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5693972 | Method and system for protecting a stacked gate edge in a semiconductor device from self-aligned source (sas) etch in a semiconductor device | — | 1997-12-02 |
| 5674764 | Method of making asymmetric non-volatile memory cell | Man Wong | 1997-10-07 |
| 5656509 | Method and test structure for determining gouging in a flash EPROM cell during SAS etch | — | 1997-08-12 |
| 5652155 | Method for making semiconductor circuit including non-ESD transistors with reduced degradation due to an impurity implant | Ming Sang Kwan, Chi Chang | 1997-07-29 |
| 5650964 | Method of inhibiting degradation of ultra short channel charge-carrying devices during discharge | Jian Chen, James Hsu, Shengwen Luan, Yuan Tang, Michael A. Van Buskirk | 1997-07-22 |
| 5646430 | Non-volatile memory cell having lightly-doped source region | Cetin Kaya | 1997-07-08 |
| 5625220 | Sublithographic antifuse | Kueing-Long Chen, Bert R. Riemenschneider | 1997-04-29 |
| 5624859 | Method for providing device isolation and off-state leakage current for a semiconductor device | Mark T. Ramsbey | 1997-04-29 |
| 5612914 | Asymmetrical non-volatile memory cell, arrays and methods for fabricating same | Man Wong | 1997-03-18 |
| 5596531 | Method for decreasing the discharge time of a flash EPROM cell | Ming Sang Kwan, Chi Chang, Sameer Haddad, Yuan Tang | 1997-01-21 |