Issued Patents 1994
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5377139 | Process forming an integrated circuit | Craig S. Lage, Frank K. Baker, Jr., Kent J. Cooper | 1994-12-27 |
| 5376562 | Method for forming vertical transistor structures having bipolar and MOS devices | Jon T. Fitch, Carlos Mazure, Keith E. Witek | 1994-12-27 |
| 5374573 | Method of forming a self-aligned thin film transistor | Kent J. Cooper, Scott S. Roth, Howard C. Kirsch | 1994-12-20 |
| 5373170 | Semiconductor memory device having a compact symmetrical layout | James R. Pfiester | 1994-12-13 |
| 5371026 | Method for fabricating paired MOS transistors having a current-gain differential | James R. Pfiester, Hsing-Huang Tseng | 1994-12-06 |
| 5348903 | Process for fabricating a semiconductor memory cell having thin-film driver transistors overlapping dual wordlines | James R. Pfiester | 1994-09-20 |
| 5334861 | Semiconductor memory cell | James R. Pfiester | 1994-08-02 |
| 5330929 | Method of making a six transistor static random access memory cell | James R. Pfiester | 1994-07-19 |
| 5324960 | Dual-transistor structure and method of formation | James R. Pfiester | 1994-06-28 |
| 5308997 | Self-aligned thin film transistor | Kent J. Cooper, Scott S. Roth, Howard C. Kirsch | 1994-05-03 |
| 5308782 | Semiconductor memory device and method of formation | Carlos Mazure, Jon T. Fitch, Keith E. Witek | 1994-05-03 |
| 5291053 | Semiconductor device having an overlapping memory cell | James R. Pfiester | 1994-03-01 |
| 5279976 | Method for fabricating a semiconductor device having a shallow doped region | James R. Pfiester, David Burnett | 1994-01-18 |
| 5275964 | Method for compactly laying out a pair of transistors | Frank K. Baker, Jr. | 1994-01-04 |