Issued Patents 1994
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5377143 | Multiplexing sense amplifier having level shifter circuits | — | 1994-12-27 |
| 5377150 | Disabling sense amplifier | — | 1994-12-27 |
| 5357236 | Parallelized difference flag logic | — | 1994-10-18 |
| 5357235 | Parallelized magnitude comparator | — | 1994-10-18 |
| 5355340 | Semiconductor memory with multiplexed redundancy | Thomas A. Coker | 1994-10-11 |
| 5355344 | Structure for using a portion of an integrated circuit die | — | 1994-10-11 |
| 5355113 | Serialized difference flag circuit | — | 1994-10-11 |
| 5349246 | Input buffer with hysteresis characteristics | — | 1994-09-20 |
| 5349243 | Latch controlled output driver | — | 1994-09-20 |
| 5341336 | Method for stress testing decoders and periphery circuits | — | 1994-08-23 |
| 5339277 | Address buffer | — | 1994-08-16 |
| 5337273 | Charge sharing flash clear for memory arrays | — | 1994-08-09 |
| 5319347 | Parallelized magnitude comparator for comparing a binary number to a fixed value | — | 1994-06-07 |
| 5311473 | Semiconductor memory with improved test mode | Thomas A. Coker | 1994-05-10 |
| 5311467 | Selective bulk write operation | Mark A. Lysinger, William C. Slemmer, James Brady | 1994-05-10 |
| 5305268 | Semiconductor memory with column equilibrate on change of data during a write cycle | — | 1994-04-19 |
| 5300828 | Slew rate limited output buffer with bypass circuitry | — | 1994-04-05 |
| 5297090 | Semiconductor memory with column decoded bit line equilibrate | — | 1994-03-22 |
| 5295104 | Integrated circuit with precharged internal data bus | — | 1994-03-15 |
| 5295102 | Semiconductor memory with improved redundant sense amplifier control | — | 1994-03-15 |