Issued Patents 1994
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5359723 | Cache memory hierarchy having a large write through first level that allocates for CPU read misses only and a small write back second level that allocates for CPU write misses only | Gregory S. Mathews | 1994-10-25 |
| 5276888 | Computer system with interrupts transparent to its operating system and application programs | James P. Kardach, Gregory S. Mathews, Cau L. Nguyen, Sung-Soo Cho, Kameswaran Sivamani +2 more | 1994-01-04 |