Issued Patents 1994
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5349672 | Data processor having logical address memories and purge capabilities | Tadahiko Nishimukai, Atsushi Hasegawa, Ikuya Kawasaki, Makoto Hanawa | 1994-09-20 |
| 5301285 | Data processor having two instruction registers connected in cascade and two instruction decoders | Makoto Hanawa, Osamu Nishii, Susumu Narita | 1994-04-05 |
| 5287484 | Multi-processor system for invalidating hierarchical cache | Osamu Nishii, Hirokazu Aoki, Takashi Kikuchi, Yasuhiko Saigou | 1994-02-15 |
| 5283886 | Multiprocessor cache system having three states for generating invalidating signals upon write accesses | Osamu Nishii, Hirokazu Aoki, Kanji Oishi, Jun Kitano, Susumu Hatano | 1994-02-01 |