Issued Patents 1994
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5367697 | Means for providing a graceful power shut-down capability in a multiprocessor system having certain processors not inherently having a power shut-down capability | George J. Barlow | 1994-11-22 |
| 5341495 | Bus controller having state machine for translating commands and controlling accesses from system bus to synchronous bus having different bus protocols | Thomas F. Joyce, Richard A. Lemay, Bruno DiPlacido, Martin Massucci | 1994-08-23 |
| 5341501 | Processor bus access | Richard A. Lemay, Chester M. Nibby, Jr. | 1994-08-23 |
| 5341508 | Processing unit having multiple synchronous bus for sharing access and regulating system bus access to synchronous bus | Thomas F. Joyce | 1994-08-23 |
| 5293384 | Microprocessor bus interface protocol analyzer | Richard A. Lemay | 1994-03-08 |
| 5283870 | Method and apparatus for avoiding processor deadly embrace in a multiprocessor system | Thomas F. Joyce | 1994-02-01 |