Issued Patents 1989
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4890261 | Variable word length circuit of semiconductor memory | Kazuyasu Fujishima, Yoshio Matsuda | 1989-12-26 |
| 4843596 | Semiconductor memory device with address transition detection and timing control | Hideshi Miyatake, Masaki Kumanoya, Yasuhiro Konishi, Katsumi Dosaka, Hiroyuki Yamasaki +3 more | 1989-06-27 |
| 4837747 | Redundary circuit with a spare main decoder responsive to an address of a defective cell in a selected cell block | Katsumi Dosaka, Masaki Kumanoya, Hideshi Miyatake, Yasuhiro Konishi, Hiroyuki Yamasaki +3 more | 1989-06-06 |
| 4835743 | Semiconductor memory device performing multi-bit Serial operation | Kazuyasu Fujishima, Hideyuki Ozaki, Kazutoshi Hirayama | 1989-05-30 |
| 4833654 | Method of and circuitry for generating staggered restore timing signals in block partitioned DRAM | Makoto Suwa | 1989-05-23 |
| 4833650 | Semiconductor memory device including programmable mode selection circuitry | Kazutoshi Hirayama, Hideyuki Ozaki, Kazuyasu Fujishima | 1989-05-23 |
| 4823322 | Dynamic random access memory device having an improved timing arrangement | Hideshi Miyatake, Masaki Kumanoya, Yasuhiro Konishi, Katsumi Dosaka, Hiroyuki Yamasaki +3 more | 1989-04-18 |
| 4808844 | Semiconductor device | Hideyuki Ozaki, Kazutoshi Hirayama, Kazuyasu Fujishima | 1989-02-28 |
| 4809230 | Semiconductor memory device with active pull up | Yasuhiro Konishi, Kazuyasu Fujishima, Masaki Kumanoya, Hideshi Miyatake, Katsumi Dosaka | 1989-02-28 |