Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11004499 | Latency control circuit and method | Young Tae Kim, Chan-Seok Park, Youngjoo Choi | 2021-05-11 |
| 10564692 | Memory device and power reduction method of the same memory device | — | 2020-02-18 |
| 10217497 | Delay locked loop circuit and method of controlling same | — | 2019-02-26 |
| 9721675 | Memory device having input circuit and operating method of same | — | 2017-08-01 |
| 9263127 | Memory with specific driving mechanism applied on source line | — | 2016-02-16 |
| 9202532 | Burst sequence control and multi-valued fuse scheme in memory device | — | 2015-12-01 |
| 7929367 | Low power memory control circuits and methods | Seung-Moon Yoo, Young Tae Kim, Sung Ju Son, Sang-Kyun Han, Sun Hyoung Lee | 2011-04-19 |
| 7839701 | Low voltage operation DRAM control circuits | — | 2010-11-23 |
| 7705625 | Source transistor configurations and control methods | Seung-Moon Yoo, Jae Hoon Yoo, Jeongduk Sohn, Sung Ju Son, Young Tae Kim +2 more | 2010-04-27 |
| 7522464 | Dynamic memory refresh configurations and leakage control methods | Seung-Moon Yoo, Sangho Shin, Sang-Kyun Han | 2009-04-21 |
| 7324390 | Low voltage operation dram control circuits | — | 2008-01-29 |
| 7301322 | CMOS constant voltage generator | — | 2007-11-27 |
| 7082048 | Low voltage operation DRAM control circuits | — | 2006-07-25 |
| 5923612 | Synchronous semiconductor memory device having macro command storage and execution method therefor | Chul-Woo Park | 1999-07-13 |
| 5748639 | Multi-bit test circuits for integrated circuit memory devices and related methods | Churoo Park | 1998-05-05 |
| 5583815 | Mode setting curcuit and method of a semiconductor memory device | Seong-Ook Jung | 1996-12-10 |