Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| D889855 | Smart mirror | — | 2020-07-14 |
| D825206 | Smart mirror | — | 2018-08-14 |
| 9396728 | Devices and systems for remote control | Yun-Jung Wu, Liang Huang, Yi-Hsiu Lee | 2016-07-19 |
| 9123344 | Devices and systems for remote control | Yun-Jung Wu, Liang Huang, Yi-Hsiu Lee | 2015-09-01 |
| 8586810 | Chiral diene ligands, a fabrication method thereof and applications thereof | Hsyueh-Liang Wu, Chun-Chih Chen, Wei Wei, Jo-Hsuan Fang | 2013-11-19 |
| 7186615 | Method of forming a floating gate for a split-gate flash memory device | — | 2007-03-06 |
| 6319823 | Process for forming a borderless via in a semiconductor device | Jyh-Ren Wu | 2001-11-20 |
| 6287950 | Bonding pad structure and manufacturing method thereof | Jyh-Ren Wu | 2001-09-11 |
| 6255164 | EPROM cell structure and a method for forming the EPROM cell structure | Ling-Sung Wang | 2001-07-03 |
| 6242303 | Nonvolatile memories with high capacitive-coupling ratio | Ling-Sung Wang | 2001-06-05 |
| 6225660 | Single poly EPLD cell and its fabricating method | — | 2001-05-01 |
| 6222201 | Method of forming a novel self-aligned offset thin film transistor and the structure of the same | Ching-Nan Yang | 2001-04-24 |
| 6130462 | Vertical poly load device in 4T SRAM technology | Ching-Nan Yang | 2000-10-10 |
| 6107660 | Vertical thin film transistor | Ching-Nan Yang | 2000-08-22 |
| 5866447 | Modified zero layer align method of twin well MOS fabrication | — | 1999-02-02 |
| 5776816 | Nitride double etching for twin well align | Chwan Chao Chen | 1998-07-07 |
| 5259816 | Ventilating apparatus | Po C. Ke, Kuo-Tsun Lai, Pang-Tsung Lu, Ching-Chung Lai | 1993-11-09 |