Issued Patents All Time
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12159093 | Using barycenter compact model to determine IR drop for circuit network | — | 2024-12-03 |
| 12039063 | Links platform-as-a-service | Aaron J. Passey, Fangzhou Wang, Eric Cunningham, Royce Ausburn, Nicholas Larson +2 more | 2024-07-16 |
| 12039068 | Links as actors in a file system | Aaron J. Passey, Fangzhou Wang, Eric Cunningham, Royce Ausburn, Nicholas Larson +2 more | 2024-07-16 |
| 11847397 | Barycenter compact model to determine IR drop exact solution for circuit network | — | 2023-12-19 |
| 11675864 | Proxy links to support legacy links | Aaron J. Passey, Fangzhou Wang, Eric Cunningham, Royce Ausburn, Nicholas Larson +2 more | 2023-06-13 |
| 11609770 | Co-managing links with a link platform and partner service | Aaron J. Passey, Fangzhou Wang, Eric Cunningham, Royce Ausburn, Nicholas Larson +2 more | 2023-03-21 |
| 11574105 | Using a barycenter compact model for a circuit network | — | 2023-02-07 |
| 10885255 | Using a Barycenter compact model for a circuit network | — | 2021-01-05 |
| 10558772 | Partitioning a system graph for circuit simulation to obtain an exact solution | — | 2020-02-11 |
| 10366195 | Using a Barycenter compact model for a circuit network | — | 2019-07-30 |
| 10140396 | Partitioning electronic circuits for simulation on multiple processors | — | 2018-11-27 |
| 10068043 | Validating integrated circuit simulation results | — | 2018-09-04 |
| 9984195 | Hierarchical visualization-based analysis of integrated circuits | — | 2018-05-29 |
| 9471733 | Solving a circuit network in multicore or distributed computing environment | — | 2016-10-18 |
| 9454637 | Validating integrated circuit simulation results | — | 2016-09-27 |
| 9286430 | Hierarchical visualization-based analysis of integrated circuits | — | 2016-03-15 |
| 9218441 | Partitioning electronic circuits for simulation on multicore processors | — | 2015-12-22 |
| 9129079 | Solving a circuit network in hierarchical, multicore, and distributed computing environment | — | 2015-09-08 |
| 9122837 | Validating integrated circuit simulation results | — | 2015-09-01 |
| 9111058 | Solving a hierarchical circuit network using a barycenter compact model | — | 2015-08-18 |
| 8903686 | Partitioning electronic circuits for simulation on multicore processors | — | 2014-12-02 |
| 8818786 | Network tearing for circuit simulation | — | 2014-08-26 |
| 8738335 | Solving a circuit network in hierarchical, multicore, and distributed computing environment | — | 2014-05-27 |
| 8719760 | Validating integrated circuit simulation results | — | 2014-05-06 |
| 8694302 | Solving a hierarchical circuit network using a Barycenter compact model | — | 2014-04-08 |