DB

Dipl.-Ing. Florian Bieck

WP Wafer-Level Packaging Portfolio: 2 patents #3 of 6Top 50%
Overall (All Time): #2,064,180 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
8349707 Process for making contact with and housing integrated circuits Jürgen Leib 2013-01-08
7880179 Process for making contact with and housing integrated circuits Jürgen Leib 2011-02-01