Issued Patents All Time
Showing 1–25 of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11579973 | Methods and systems for implementing redundancy in memory controllers | Ashish Singhai, Ashwin Narasimha | 2023-02-14 |
| 11132255 | Methods and systems for implementing redundancy in memory controllers | Ashish Singhai, Ashwin Narasimha | 2021-09-28 |
| 10628260 | Methods and systems for implementing redundancy in memory controllers | Ashish Singhai, Ashwin Narasimha | 2020-04-21 |
| 10360985 | Method and apparatus for staggered start-up of a predefined, random, or dynamic number of flash memory devices | Bradley Edman Sundahl, Sean Michael O'Mullan, Gregory Charles Yancey | 2019-07-23 |
| 10191842 | Apparatus with a memory controller configured to control access to randomly accessible non-volatile memory | Vijay Karamcheti, Kumar Ganapathy, Rajesh Parekh | 2019-01-29 |
| 10156890 | Network computer systems with power management | Vijay Karamcheti, Kumar Ganapathy | 2018-12-18 |
| 10133629 | Methods and systems for implementing redundancy in memory controllers | Ashish Singhai, Ashwin Narasimha | 2018-11-20 |
| 10108340 | Method and system for a common processing framework for memory device controllers | Sriram Rupanagunta, Ashish Singhai, Sandeep Sharma, Srikant Sadasivam, Krishanth Skandakumaran +2 more | 2018-10-23 |
| 9984012 | Read writeable randomly accessible non-volatile memory modules | Vijay Karamcheti, Kumar Ganapathy, Rajesh Parekh | 2018-05-29 |
| 9928919 | Method and apparatus for staggered start-up of a predefined, random, or dynamic number of flash memory devices | Bradley Edman Sundahl, Sean Michael O'Mullan, Gregory Charles Yancey | 2018-03-27 |
| 9905303 | Front/back control of integrated circuits for flash dual inline memory modules | Ruban Kanapathippillai | 2018-02-27 |
| 9886196 | Method and system for efficient common processing in memory device controllers | Sriram Rupanagunta, Ashish Singhai, Sandeep Sharma, Srikant Sadasivam, Krishanth Skandakumaran +2 more | 2018-02-06 |
| 9836409 | Seamless application access to hybrid main memory | Vijay Karamcheti, Kumar Ganapathy, Ashish Singhai, Rajesh Parekh | 2017-12-05 |
| 9767867 | Methods of communicating to different types of memory modules in a memory channel | George Moussa, Kumar Ganapathy, Vijay Karamcheti, Rajesh Parekh | 2017-09-19 |
| 9672158 | Asymmetric memory migration in hybrid main memory | Vijay Karamcheti, Kumar Ganapathy, Ashish Singhai, Rajesh Parekh | 2017-06-06 |
| 9626290 | Memory channel connected non-volatile memory | Vijay Karamcheti, Kumar Ganapathy, Rajesh Parekh | 2017-04-18 |
| 9619326 | Methods and systems for implementing redundancy in memory controllers | Ashish Singhai, Ashwin Narasimha | 2017-04-11 |
| 9575669 | Programmable solid state drive controller and method for scheduling commands utilizing a data structure | Ashish Singhai | 2017-02-21 |
| 9513695 | Methods of managing power in network computer systems | Vijay Karamcheti, Kumar Ganapathy | 2016-12-06 |
| 9514038 | Managing memory systems containing components with asymmetric characteristics | Vijay Karamcheti | 2016-12-06 |
| 9336835 | Flash dual inline memory modules with multiplexing support circuits | Ruban Kanapathippillai | 2016-05-10 |
| 9318156 | Multi-chip packaged flash memory/support application specific integrated circuit for flash dual inline memory modules | Ruban Kanapathippillai | 2016-04-19 |
| 9262333 | Asymmetric memory migration in hybrid main memory | Vijay Karamcheti, Kumar Ganapathy, Ashish Singhai, Rajesh Parekh | 2016-02-16 |
| 9262334 | Seamless application access to hybrid main memory | Vijay Karamcheti, Kumar Ganapathy, Ashish Singhai, Rajesh Parekh | 2016-02-16 |
| 9223719 | Integrating data from symmetric and asymmetric memory | Vijay Karamcheti, Kumar Ganapathy, Ashish Singhai, Rajesh Parekh | 2015-12-29 |