TC

Tsai-Sheng Chen

VT Via Technologies: 8 patents #72 of 1,108Top 7%
SC Shanghai Zhaoxin Semiconductor Co.: 5 patents #19 of 177Top 15%
VC Via Alliance Semiconductor Co.: 1 patents #92 of 157Top 60%
Overall (All Time): #329,542 of 4,157,543Top 8%
14
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12191242 Contact arrangement and electronic assembly Nai-Shung Chang, Yun-Han Chen, Chang-Li Tan, Sheng-Bang Ou Yang 2025-01-07
11362464 Contact arrangement, circuit board, and electronic assembly Nai-Shung Chang, Yun-Han Chen, Hsiu-Wen Ho, Chang-Li Tan, Chun-Yen Kang +1 more 2022-06-14
11316305 Contact arrangement, circuit board, and electronic assembly Nai-Shung Chang, Yun-Han Chen, Hsiu-Wen Ho, Chang-Li Tan, Chun-Yen Kang +1 more 2022-04-26
10568199 Printed circuit board and semiconductor package structure Nai-Shung Chang, Chang-Li Tan, Yun-Han Chen, Hsiu-Wen Ho 2020-02-18
10568200 Printed circuit board and semiconductor package structure Nai-Shung Chang, Chang-Li Tan, Yun-Han Chen, Hsiu-Wen Ho 2020-02-18
10568198 Printed circuit board and semiconductor package structure Nai-Shung Chang, Chang-Li Tan, Yun-Han Chen, Hsiu-Wen Ho 2020-02-18
9198286 Circuit board and electronic assembly Nai-Shung Chang, Yun-Han Chen, Chun-Yen Kang 2015-11-24
6981162 Suspend-to-RAM controlling circuit Nai-Shung Chang 2005-12-27
6946731 Layout structure for providing stable power source to a main bridge chip substrate and a motherboard Nai-Shung Chang, Shu-Hui Chen, Chia-Hsing Yu 2005-09-20
6888071 Layout structure and method for supporting two different package techniques of CPU Nai-Shung Chang, Shu-Hui Chen 2005-05-03
6877102 Chipset supporting multiple CPU's and layout method thereof Nai-Shung Chang, Shu-Hui Chen 2005-04-05
6794744 Layout structure and method for supporting two different package techniques of CPU Nai-Shung Chang, Shu-Hui Chen 2004-09-21
6377510 Memory control system for controlling write-enable signals Nai-Shung Chang, Shu-Hui Chen 2002-04-23
6134701 Computer motherboard with a control chip having specific pin arrangement for fast cache access Shu-Hui Chen, Nai-Shung Chang 2000-10-17