WT

Wen-Tsing Tzeng

VS Vanguard International Semiconductor: 2 patents #238 of 585Top 45%
Overall (All Time): #2,222,355 of 4,157,543Top 55%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6294474 Process for controlling oxide thickness over a fusible link using transient etch stops Yue Chen, Kau-Jan Wang 2001-09-25
6180503 Passivation layer etching process for memory arrays with fusible links Chun-Pin Yang, Hsing-Lien Lin 2001-01-30