Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6284645 | Controlling improvement of critical dimension of dual damasceue process using spin-on-glass process | Yu-Tai Tsai, Chien-Chung Huang, Huang-Hui Wu | 2001-09-04 |
| 6255162 | Method of gap filling | Yu-Tai Tsai, Huang-Hui Wu, Chien-Chung Huang | 2001-07-03 |
| 6248662 | Method of improving gap filling characteristics of dielectric layer by implantation | Huang-Hui Wu, Yu-Tai Tsai, Chien-Chung Huang | 2001-06-19 |
| 6239024 | Method of filling gap with dielectrics | Chien-Chung Huang, Huang-Hui Wu, Yu-Tai Tsai | 2001-05-29 |
| 6239043 | Method for modulating uniformity of deposited layer thickness | — | 2001-05-29 |
| 6204096 | Method for reducing critical dimension of dual damascene process using spin-on-glass process | Chien-Chung Huang, Yu-Tai Tsai, Huang-Hui Wu | 2001-03-20 |
| 6133131 | Method of forming a gate spacer on a semiconductor wafer | — | 2000-10-17 |
| 6103619 | Method of forming a dual damascene structure on a semiconductor wafer | — | 2000-08-15 |