Issued Patents All Time
Showing 26–48 of 48 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5508547 | LDMOS transistor with reduced projective area of source region | — | 1996-04-16 |
| 5501996 | Method of manufacture of high coupling ratio single polysilicon floating gate EPROM or EEPROM cell | Jyh-Kuang Lin | 1996-03-26 |
| 5498553 | Method of making a metal gate high voltage integrated circuit | — | 1996-03-12 |
| 5489541 | Process of fabricating a bipolar junction transistor | Ying-Tzung Wang | 1996-02-06 |
| 5486482 | Process for fabricating metal-gate CMOS transistor | — | 1996-01-23 |
| 5482873 | Method for fabricating a bipolar power transistor | — | 1996-01-09 |
| 5478760 | Process for fabricating a vertical bipolar junction transistor | — | 1995-12-26 |
| 5466616 | Method of producing an LDMOS transistor having reduced dimensions, reduced leakage, and a reduced propensity to latch-up | — | 1995-11-14 |
| 5455188 | Process for fabricating a lateral bipolar junction transistor | — | 1995-10-03 |
| 5451805 | VDMOS transistor with reduced projective area of source region | — | 1995-09-19 |
| 5449627 | Lateral bipolar transistor and FET compatible process for making it | Ying-Tzung Wang | 1995-09-12 |
| 5444002 | Method of fabricating a short-channel DMOS transistor with removable sidewall spacers | — | 1995-08-22 |
| 5442214 | VDMOS transistor and manufacturing method therefor | — | 1995-08-15 |
| 5424231 | Method for manufacturing a VDMOS transistor | — | 1995-06-13 |
| 5424233 | Method of making electrically programmable and erasable memory device with a depression | Jyh-Kuang Lin | 1995-06-13 |
| 5422286 | Process for fabricating high-voltage semiconductor power device | — | 1995-06-06 |
| 5401682 | Method of fabricating high voltage junction termination extension structure for a semiconductor integrated circuit device | — | 1995-03-28 |
| 5395777 | Method of producing VDMOS transistors | — | 1995-03-07 |
| 5393679 | Use of double charge implant to improve retrograde process PMOS punch through voltage | — | 1995-02-28 |
| 5382820 | High voltage CMOS device to integrate low voltage controlling device | Nai-Jen Yeh | 1995-01-17 |
| 5376568 | Method of fabricating high voltage complementary metal oxide semiconductor transistors | — | 1994-12-27 |
| 5376572 | Method of making an electrically erasable programmable memory device with improved erase and write operation | Jyh-Kuang Lin | 1994-12-27 |
| 5360750 | Method of fabricating lateral bipolar transistors | — | 1994-11-01 |