Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6281067 | Self-aligned silicide process for forming silicide layer over word lines in DRAM and transistors in logic circuit region | Sun-Chieh Chien, Jhy-Jeng Liu, Wei-Wu Liao | 2001-08-28 |
| 6258651 | Method for forming an embedded memory and a logic circuit on a single substrate | Jason Jenq | 2001-07-10 |
| 6153513 | Method of fabricating self-aligned capacitor | Chia-Wen Liang | 2000-11-28 |
| 6150218 | Method for simutaneously forming bit-line contacts and node contacts | Chia-Wen Liang | 2000-11-21 |
| 6096594 | Fabricating method of a dynamic random access memory | Kun-Chi Lin, Chia-Wen Liang | 2000-08-01 |
| 6080666 | Method for increasing landing pad area | Der-Yuan Wu | 2000-06-27 |
| 6030878 | Method of fabricating a dynamic random access memory capacitor | Chia-Hung Kao | 2000-02-29 |
| 6004846 | Method for manufacturing DRAM capacitor using hemispherical grained silicon | — | 1999-12-21 |
| 5940714 | Method of fabricating a capacitor electrode structure in integrated circuit through self-aligned process | Chia-Wen Liang | 1999-08-17 |