Issued Patents All Time
Showing 101–114 of 114 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6268256 | Method for reducing short channel effect | — | 2001-07-31 |
| 6248623 | Method for manufacturing embedded memory with different spacer widths | Sun-Chieh Chien | 2001-06-19 |
| 6200880 | Method for forming shallow trench isolation | Sun-Chieh Chien, Tzung-Han Lee, Wei-Wu Liao | 2001-03-13 |
| 6169025 | Method of fabricating self-align-contact | — | 2001-01-02 |
| 6159850 | Method for reducing resistance of contact window | Tzung-Han Lee | 2000-12-12 |
| 6153479 | Method of fabricating shallow trench isolation structures | Wei-Wu Liao, Andy Chuang | 2000-11-28 |
| 6153457 | Method of fabricating self-align-contact | — | 2000-11-28 |
| 6083847 | Method for manufacturing local interconnect | — | 2000-07-04 |
| 6046081 | Method for forming dielectric layer of capacitor | — | 2000-04-04 |
| 6043144 | Bonding-pad structure for integrated circuit and method of fabricating the same | — | 2000-03-28 |
| 6043116 | Method of fabricating self-align-contact | — | 2000-03-28 |
| 6025249 | Method for manufacturing shallow trench isolation structure | — | 2000-02-15 |
| 6007953 | Method of avoiding peeling on wafer edge and mark number | Tzung-Han Lee, Chi-Fa Ku, Army Chung | 1999-12-28 |
| 5989975 | Method for manufacturing shallow trench isolation | — | 1999-11-23 |