Issued Patents All Time
Showing 51–75 of 99 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5885875 | Low voltage electro-static discharge protective device and method of fabricating the same | — | 1999-03-23 |
| 5858841 | ROM device having memory units arranged in three dimensions, and a method of making the same | — | 1999-01-12 |
| 5851910 | Method of fabricating a bonding pad window | Larry Lin | 1998-12-22 |
| 5846864 | Method of fabricating a high density mask ROM with recess channels | — | 1998-12-08 |
| 5831311 | Electro-static discharge protection device having a threshold voltage adjustment area | — | 1998-11-03 |
| 5828103 | Recessed lightly doped drain (LDD) for higher performance MOSFET | — | 1998-10-27 |
| 5786253 | Method of making a multi-level ROM device | — | 1998-07-28 |
| 5783457 | Method of making a flash memory cell having an asymmetric source and drain pocket structure | — | 1998-07-21 |
| 5777486 | Electromigration test pattern simulating semiconductor components | — | 1998-07-07 |
| 5763925 | ROM device having memory units arranged in three dimensions, and a method of making the same | — | 1998-06-09 |
| 5763313 | Process for fabricating shield for polysilicon load | Tsun-Tsai Chang | 1998-06-09 |
| 5759896 | Process for fabricating memory cells of flash memory | — | 1998-06-02 |
| 5744392 | Process for fabricating a multi-stage read-only memory device | — | 1998-04-28 |
| 5728972 | Multiple chip module for packaging integrated circuits | — | 1998-03-17 |
| 5712203 | Process for fabricating read-only memory cells using removable barrier strips | — | 1998-01-27 |
| 5710056 | DRAM with a vertical channel structure and process for manufacturing the same | — | 1998-01-20 |
| 5700711 | Method of manufacturing an SRAM load shield | Tsun-Tsai Chang, Larry Lin | 1997-12-23 |
| 5693552 | Method for fabricating read-only memory device with a three-dimensional memory cell structure | — | 1997-12-02 |
| 5643816 | High-density programmable read-only memory and the process for its fabrication | Gary Hong | 1997-07-01 |
| 5633187 | Process for fabricating read-only memory cells | — | 1997-05-27 |
| 5633530 | Multichip module having a multi-level configuration | — | 1997-05-27 |
| 5631486 | Read-only-memory having both bipolar and channel transistors | — | 1997-05-20 |
| 5627087 | Process for fabricating metal-oxide semiconductor (MOS) transistors based on lightly doped drain (LDD) structure | — | 1997-05-06 |
| 5627106 | Trench method for three dimensional chip connecting during IC fabrication | — | 1997-05-06 |
| 5627393 | Vertical channel device having buried source | — | 1997-05-06 |