Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6560675 | Method for controlling concurrent cache replace and return across an asynchronous interface | Eric Aho | 2003-05-06 |
| 6233665 | Mapping shared DRAM address bits by accessing data memory in page mode cache status memory in word mode | — | 2001-05-15 |
| 6092165 | Memory control unit using a programmable shift register for generating timed control signals | — | 2000-07-18 |
| 6049856 | System for simultaneously accessing two portions of a shared memory | — | 2000-04-11 |
| 6006296 | Scalable memory controller | Anthony P. Gold, Michael K. Benton, Eric Aho, Mark D. Luba | 1999-12-21 |
| 5920898 | Memory control unit providing optimal timing of memory control sequences between different memory segments by optimally selecting among a plurality of memory requests | Mark D. Luba | 1999-07-06 |
| 5907863 | Memory control unit using preloaded values to generate optimal timing of memory control sequences between different memory segments | — | 1999-05-25 |
| 5761703 | Apparatus and method for dynamic memory refresh | — | 1998-06-02 |
| 5757817 | Memory controller having automatic RAM detection | John L. Janssen | 1998-05-26 |