Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8060708 | Multiprocessor system having an input/output (I/O) bridge circuit for transferring data between volatile and non-volatile memory | Dinesh Maheshwari, Dinesh Ramanathan, Alakesh Chetia, Herve Jacques Clement Letourneur, Donald W. Smith | 2011-11-15 |
| 7730268 | Multiprocessor system having an input/output (I/O) bridge circuit for transferring data between volatile and non-volatile memory | Dinesh Maheshwari, Dinesh Ramanathan, Alakesh Chetia, Herve Jacques Clement Letourneur, Donald W. Smith | 2010-06-01 |
| 6223260 | Multi-bus data processing system in which all data words in high level cache memories have any one of four states and all data words in low level cache memories have any one of three states | Brian Joseph Sassone, Laurence P. Flora, David Edgar Castle | 2001-04-24 |
| 6032231 | Multiprocessor with split transaction bus architecture providing cache tag and address compare for sending retry direction to other bus module upon a match of subsequent address bus cycles to content of cache tag | — | 2000-02-29 |
| 5896052 | Methods to avoid instability | Greggory D. Donley, Paul N. Israel | 1999-04-20 |
| 5822611 | Method for cycle request with quick termination without waiting for the cycle to reach the destination by storing information in queue | Greggory D. Donley, Paul N. Israel | 1998-10-13 |
| 5761446 | Livelock avoidance | Greggory D. Donley | 1998-06-02 |
| 5758104 | Random delay subsystems | Greggory D. Donley | 1998-05-26 |
| 5732244 | Multiprocessor with split transaction bus architecture for sending retry direction to other bus module upon a match of subsequent address bus cycles to content of cache tag | — | 1998-03-24 |
| 5638015 | Avoiding instability | Greggory D. Donley, Paul N. Israel | 1997-06-10 |