CE

Clive Robert Ellis

UN Unisys: 1 patents #1,020 of 2,015Top 55%
📍 Scotts Valley, CA: #360 of 513 inventorsTop 75%
🗺 California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #3,701,852 of 4,157,543Top 90%
1
Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
5831869 Method of compacting data representations of hierarchical logic designs used for static timing analysis Robert J. Palermo 1998-11-03