Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6920528 | Smart memory | — | 2005-07-19 |
| 6681287 | Smart memory | — | 2004-01-20 |
| 6352741 | Planar high temperature superconductive integrated circuits for using ion implantation | Arnold H. Silver | 2002-03-05 |
| 6335108 | Implant-patterned superconductive device and a method for indirect ion implantation of superconductive films | John LaGraff, Claire L. Pettiette-Hall, James M. Murduck | 2002-01-01 |
| 6188919 | Using ion implantation to create normal layers in superconducting-normal-superconducting Josephson junctions | John LaGraff, James M. Murduck | 2001-02-13 |
| 6147032 | Method for indirect Ion implantation of oxide superconductive films | John LaGraff, Claire L. Pettiette-Hall, James M. Murduck | 2000-11-14 |
| 6066600 | Method of making high-T.sub.c SSNS and SNS Josephson junction | — | 2000-05-23 |
| 6051440 | Method of fabricating a low-inductance in-line resistor for superconductor integrated circuits | Arnold H. Silver | 2000-04-18 |
| 5912503 | Planar in-line resistors for superconductor circuits | Arnold H. Silver | 1999-06-15 |
| 5892243 | High-temperature SSNS and SNS Josephson junction and method of making junction | — | 1999-04-06 |
| 5872731 | Multi-state Josephson memory | Arnold H. Silver, Robert D. Sandell | 1999-02-16 |
| 5863868 | Superconductive quantum interference device for digital logic circuits | Kenneth P. Daly, James M. Murduck | 1999-01-26 |
| 5780314 | Method of forming a high performance low thermal loss bi-temperature superconductive device | — | 1998-07-14 |
| 5773875 | High performance, low thermal loss, bi-temperature superconductive device | — | 1998-06-30 |
| 5578226 | Multi-layered superconductive interconnects | Arnold H. Silver | 1996-11-26 |
| 5436451 | High-speed gamma pulse suppression circuit for semiconductor infrared detectors | Arnold H. Silver | 1995-07-25 |
| 5311020 | Monolithically-integrated semiconductor/superconductor infrared detector and readout circuit | Arnold H. Silver, Bruce J. Dalrymple, Szutsun S. Ou, Eugene L. Dines, Susanne L. Thomasson | 1994-05-10 |
| 5286336 | Submicron Josephson junction and method for its fabrication | Arnold H. Silver, Robert D. Sandell, James M. Murduck | 1994-02-15 |
| 4892844 | Making a low resistance three layered contact for silicon devices | Robin Cheung, Bernard W. K. Ho, Hsiang-Wen Chen | 1990-01-09 |
| 4796081 | Low resistance metal contact for silicon devices | Robin Cheung, Bernard W. K. Ho, Hsiang-Wen Chen | 1989-01-03 |
| 4762805 | Nitride-less process for VLSI circuit device isolation | Robin Cheung | 1988-08-09 |
| 4727045 | Plugged poly silicon resistor load for static random access memory cells | Robin Cheung | 1988-02-23 |
| 4693925 | Integrated circuit structure having intermediate metal silicide layer | Robin Cheung | 1987-09-15 |
| 4581815 | Integrated circuit structure having intermediate metal silicide layer and method of making same | Robin Cheung | 1986-04-15 |
| 4569122 | Method of forming a low resistance quasi-buried contact | — | 1986-02-11 |