| 12249381 |
Faster multi-cell read operation using reverse read calibrations |
Kitae Park |
2025-03-11 |
| 11664076 |
Memory device including voltage control for diffusion regions associated with memory blocks |
Shigekazu Yamada |
2023-05-30 |
| 11574663 |
Data latch circuit and semiconductor memory device |
Keisuke NAKATSUKA, Tomoya Sanuki, Takashi Maeda, Hideaki Aochi |
2023-02-07 |
| 11250915 |
Semiconductor memory |
Hiroshi Maejima, Katsuaki Isobe, Naohito Morozumi, Susumu Fujimura |
2022-02-15 |
| 11164888 |
Semiconductor memory device |
Takuya Futatsuyama |
2021-11-02 |
| 10867641 |
Data latch circuit and semiconductor memory device |
Keisuke NAKATSUKA, Tomoya Sanuki, Takashi Maeda, Hideaki Aochi |
2020-12-15 |
| 10839913 |
Semiconductor memory |
Hiroshi Maejima, Katsuaki Isobe, Naohito Morozumi, Susumu Fujimura |
2020-11-17 |
| 10825829 |
Semiconductor memory device |
Takuya Futatsuyama |
2020-11-03 |
| 10783975 |
Semiconductor memory device |
Yasuhiro Shimura, Koki Ueno |
2020-09-22 |
| 10529731 |
Semiconductor memory device in which different upper limit values are set for pass voltages |
Yasuhiro Shimura |
2020-01-07 |
| 10332593 |
Semiconductor memory device configured to sense memory cell threshold voltages in ascending order |
Takahiko Sasaki, Tomonori Kurosawa, Rieko FUNATSUKI |
2019-06-25 |
| 10269828 |
Semiconductor memory device |
Takuya Futatsuyama |
2019-04-23 |
| 9990998 |
Semiconductor memory device and memory system |
Noboru Ooike |
2018-06-05 |
| 9224488 |
Semiconductor memory device |
Takuya Futatsuyama |
2015-12-29 |
| 8618665 |
Pattern layout in semiconductor device |
Fumiharu Nakajima, Toshiaki Edahiro |
2013-12-31 |
