Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11954031 | Enhancing cache dirty information | Ezequiel Alves | 2024-04-09 |
| 11611358 | Systems and methods for detecting or preventing false detection of three error bits by SEC | — | 2023-03-21 |
| 11449423 | Enhancing cache dirty information | Ezequiel Alves | 2022-09-20 |
| 11394402 | Efficient decoding of n-dimensional error correction codes | Paul Edward Hanham, Francesco Giorgio | 2022-07-19 |
| 10886947 | Efficient decoding of n-dimensional error correction codes | Paul Edward Hanham, Francesco Giorgio | 2021-01-05 |
| 10872013 | Non volatile memory controller device and method for adjustment | Paul Edward Hanham, Francesco Giorgio | 2020-12-22 |
| 10747613 | Pooled frontline ECC decoders in memory systems | Paul Edward Hanham, Francesco Giorgio, Senthilkumar Diraviam, Jonghyeon Kim | 2020-08-18 |
| 10613927 | System and method for improved memory error rate estimation | Paul Edward Hanham, Francesco Giorgio | 2020-04-07 |
| 10498362 | Low power error correcting code (ECC) system | Paul Edward Hanham, Josh Bowman | 2019-12-03 |
| 10447301 | Optimal LDPC bit flip decision | Paul Edward Hanham, Francesco Giorgio | 2019-10-15 |
| 10404279 | Low BER hard-decision LDPC decoder | Paul Edward Hanham, Neil Buxton | 2019-09-03 |
| 10340951 | Soft decision LDPC decoder with improved LLR from neighboring bits | Paul Edward Hanham, Francesco Giorgio | 2019-07-02 |
| 10084479 | Low BER hard-decision LDPC decoder | Paul Edward Hanham, Neil Buxton | 2018-09-25 |
| 9407294 | Non-volatile memory controller with error correction (ECC) tuning via error statistics collection | Paul Edward Hanham, Neil Buxton | 2016-08-02 |