Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11544066 | Branch target buffer arrangement with preferential storage for unconditional branch instructions | Rakesh Kumar, Vijay Nagarajan | 2023-01-03 |
| 11269641 | Branch target buffer for a data processing apparatus | Rakesh Kumar, Vijay Nagarajan, Cheng Chieh Huang | 2022-03-08 |
| 10929174 | Atomic object reads for in-memory rack-scale computing | Alexandros Daglis, Babak Falsafi | 2021-02-23 |
| 9996358 | Unified prefetching into instruction cache and branch target buffer | Babak Falsafi, Ilknur Cansu Kaynak | 2018-06-12 |
| 9734063 | Scale-out non-uniform memory access | Stanko Novakovic, Alexandros Daglis, Edouard Bugnion, Babak Falsafi | 2017-08-15 |
| 9703707 | Network-on-chip using request and reply trees for low-latency processor-memory communication | Babak Falsafi, Pejman Lotfi Kamran | 2017-07-11 |
| 9571399 | Method and apparatus for congestion-aware routing in a computer interconnection network | Paul Gratz, Stephen W. Keckler | 2017-02-14 |
| 8694704 | Method and apparatus for congestion-aware routing in a computer interconnection network | Paul Gratz, Steven William Keckler | 2014-04-08 |
| 8307116 | Scalable bus-based on-chip interconnection networks | Stephen W. Keckler | 2012-11-06 |
| 8285900 | Method and apparatus for congestion-aware routing in a computer interconnection network | Paul Gratz, Stephen W. Keckler | 2012-10-09 |