Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10962595 | Efficient realization of coverage collection in emulation | Boris Gommershtadt, Florent Sébastien Marc Emmanuel Claude Duru, Gabriel Gouvine, Dmitry Korchemny | 2021-03-30 |
| 10325046 | Formal method for clock tree analysis and optimization | Lingyi Liu, Ngai Ngai William Hung, Sitanshu Seth, Dhiraj Goswami | 2019-06-18 |
| 8359186 | Method for delay immune and accelerated evaluation of digital circuits by compiling asynchronous completion handshaking means | Subbu Ganesan, Ramesh Narayanaswamy, Ian Michael Nixon, Thomas Spencer | 2013-01-22 |
| 7548842 | Scalable system for simulation and emulation of electronic circuits using asymmetrical evaluation and canvassing instruction processors | Subbu Ganesan, Ramesh Narayanaswamy, Ian Michael Nixon, Thomas Spencer | 2009-06-16 |
| 7509602 | Compact processor element for a scalable digital logic verification and emulation system | Subbu Ganesan, Ramesh Narayanaswamy, Ian Michael Nixon, Thomas Spencer | 2009-03-24 |
| 6691287 | Functional verification system | Subbu Ganesan, Ramesh Narayanaswamy, Ian Michael Nixon | 2004-02-10 |
| 6629297 | Tracing the change of state of a signal in a functional verification system | Subbu Ganesan, Ramesh Narayanaswamy, Ian Michael Nixon | 2003-09-30 |
| 6625786 | Run-time controller in a functional verification system | Subbu Ganesan, Ramesh Narayanaswamy, Ian Michael Nixon | 2003-09-23 |
| 6480988 | Functional verification of both cycle-based and non-cycle based designs | Subbu Ganesan, Ramesh Narayanaswamy, Ian Michael Nixon | 2002-11-12 |
| 6470480 | Tracing different states reached by a signal in a functional verification system | Subbu Ganesan, Ramesh Narayanaswamy, Ian Michael Nixon | 2002-10-22 |