Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12026115 | Compensating DC loss in USB 2.0 high speed applications | Yanli Fan | 2024-07-02 |
| 11580053 | Serial bus signal conditioner for detecting initiation of or return to high-speed signaling | Win Naing Maung, Suzanne Mary Vining, Douglas Edward Wente, Huanzhang Huang | 2023-02-14 |
| 11068428 | Adjustable embedded universal serial bus 2 low-impedance driving duration | Win Naing Maung, Huanzhang Huang, Douglas Edward Wente | 2021-07-20 |
| 11068435 | Serial bus signal conditioner | Win Naing Maung, Suzanne Mary Vining, Douglas Edward Wente, Huanzhang Huang | 2021-07-20 |
| 10972081 | Delay cell | Yanfei Jiang, Huanzhang Huang, Shita Guo | 2021-04-06 |
| 10782717 | Jitter compensation in integrated circuit devices | Jikai Chen, Yuan Rao, Huanzhang Huang, Yanli Fan | 2020-09-22 |
| 10733129 | Compensating DC loss in USB 2.0 high speed applications | Yanli Fan | 2020-08-04 |
| 10622979 | Delay cell | Yanfei Jiang, Huanzhang Huang, Shita Guo | 2020-04-14 |
| 10394740 | Signal line switch arrangement with multiple paths between a charge pump and a transistor control terminal | Shita Guo, Yanli Fan, Huanzhang Huang, Yanfei Jiang | 2019-08-27 |
| 9800235 | Adaptive edge-rate boosting driver with programmable strength for signal conditioning | M D Anwar Sadat, Hao Liu | 2017-10-24 |
| 9710411 | Signal conditioner | Win Naing Maung, Suzanne Mary Vining, Hao Liu | 2017-07-18 |
| 8324949 | Adaptive quadrature correction for quadrature clock path deskew | Alexander Cherkassky, David H. Elwart, II, Huanzhang Huang, Li Yang, Matt Rowley +2 more | 2012-12-04 |