Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7814386 | Built in self test for input/output characterization | John Joseph Seibold, Vinay B. Jayaram | 2010-10-12 |
| 6285172 | Digital phase-locked loop circuit with reduced phase jitter frequency | — | 2001-09-04 |