Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12418281 | Low area and power multi-bit flip-flop | Madhavan Sainath Rao Pissay, Badarish Mohan Subbannavar | 2025-09-16 |
| 12146912 | Clock gating circuits and methods for dual-edge-triggered applications | Gokul Sabada, Madhavan Sainath Rao Pissay, Badarish Mohan Subbannavar | 2024-11-19 |
| 11946973 | Hold time improved low area flip-flop architecture | Badarish Mohan Subbannavar, Madhavan Sainath Rao Pissay | 2024-04-02 |
| 11916555 | Flip-flop with internal circuit for generating inflated low and high pulse width signals | Badarish Mohan Subbannavar, Gokul Sabada | 2024-02-27 |
| 11509294 | Reduced area, reduced power flip-flop | Badarish Mohan Subbannavar, Suvam Nandi | 2022-11-22 |
| 11043937 | Reduced area, reduced power flip-flop | Badarish Mohan Subbannavar, Suvam Nandi | 2021-06-22 |