Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5805854 | System and process for memory column address organization in a computer system | — | 1998-09-08 |
| 5802555 | Computer system including a refresh controller circuit having a row address strobe multiplexer and associated method | — | 1998-09-01 |
| 5778425 | Electronic system having a first level write through cache memory and smaller second-level write-back cache memory and method of operating the same | — | 1998-07-07 |
| 5737765 | Electronic system with circuitry for selectively enabling access to configuration registers used by a memory controller | — | 1998-04-07 |
| 5737764 | Generation of memory column addresses using memory array type bits in a control register of a computer system | — | 1998-04-07 |
| 5737563 | Determination of memory bank sizes in a computer system | — | 1998-04-07 |
| 5737748 | Microprocessor unit having a first level write-through cache memory and a smaller second-level write-back cache memory | — | 1998-04-07 |
| 5724553 | Electronic system with circuitry for generating memory column addresses using memory array type bits in a control register | — | 1998-03-03 |
| 5713006 | Electronic device and method for selective enabling of access to configuration registers used by a memory controller | — | 1998-01-27 |