Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12425276 | Equalization adaptation engine assisted baseline wander correction of data | Amit Rane | 2025-09-23 |
| 12184279 | Methods and apparatus to perform CML-to-CMOS deserialization | Nithin Sathisan Poduval, Roland Nii Ofei Ribeiro | 2024-12-31 |
| 11916703 | Error sampler circuit | Nithin Sathisan Poduval, Roland Nii Ofei Ribeiro | 2024-02-27 |
| 11888478 | Methods and apparatus to perform CML-to-CMOS deserialization | Nithin Sathisan Poduval, Roland Nii Ofei Ribeiro | 2024-01-30 |
| 11743080 | Sample-and-hold-based retimer supporting link training | Amit Rane, Ashwin Kottilvalappil Vijayan | 2023-08-29 |
| 11621715 | Coarse equalizer adaptation and rate detection for high-speed retimers | Robin Gupta | 2023-04-04 |
| 11575546 | Error sampler circuit | Nithin Sathisan Poduval, Roland Nii Ofei Ribeiro | 2023-02-07 |
| 11539555 | Enhanced discrete-time feedforward equalizer | Ashwin Kottilvalappil Vijayan, Amit Rane, Ashkan ROSHAN ZAMIR | 2022-12-27 |
| 11323109 | Self-referenced clockless delay adaptation for random data | Surya Theja Golakonda, Robin Gupta | 2022-05-03 |
| 11239834 | Clockless delay adaptation loop for random data | — | 2022-02-01 |
| 10897245 | Clockless delay adaptation loop for random data | — | 2021-01-19 |
| 10873444 | Frequency/phase lock detector for clock and data recovery circuits | Michael G. Vrazel | 2020-12-22 |
| 10804956 | Bidirectional data link | Amit Rane | 2020-10-13 |
| 10644868 | Frequency/phase lock detector for clock and data recovery circuits | Michael G. Vrazel | 2020-05-05 |
| 10608650 | Voltage-controlled oscillators with ramped voltages | Arlo Aude, Soumya Chandramouli, Roland Nii Ofei Ribeiro | 2020-03-31 |
| 10484042 | Bidirectional data link | Amit Rane | 2019-11-19 |
| 10236897 | Loss of lock detector | Robin Gupta | 2019-03-19 |